Job Information
Amazon Sr. Hardware Engineer - ML Acceleration, Annapurna Labs in Austin, Texas
Description
Annapurna Labs (our organization within Amazon Web services) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.
AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries. We are seeking experienced Hardware Design Engineers to build the next generation of our cloud server infrastructure. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies.
As a member of the Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers. You’ll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you’ll work with thought leaders in multiple technology areas. You’ll have high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve your products performance, quality and cost. We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.
Key job responsibilities
We are seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our hardware team, you will have the outstanding and meaningful opportunity to participate in the design and execution of all PCIe and Serdes topics, with the goal of creating and customized platforms that fit within AWS datacenter’s world leading technology
Basic Qualifications
Deep knowledge with PCIe interface Gen4 or above, both Electrical and Functional at the chip level and at the PCB level.
Deep understanding of Transmission line theory and Electromagnetics and its application in SerDes, Single-ended signal and parallel bus interfaces. * Work with ODMs, IP Silicon vendors, component suppliers and internal design teams on cross-boundary triaging, debugging, and resolving issues.
Hands-on lab equipment skills (VNA, Realtime scope, Sampling scope and its accessories) for electrical validation and characterization.
Scripting skills to automate tests, logs parsing and data collection.
Strong technical communication skills (verbal and written) to interface with cross-functional technical leads within and/or outside of the organization.
Preferred Qualifications
Experience with Server HW designs, Design validation, Production tests and signal integrity of high speed interfaces.
Knowledge of the product development cycle from concept to mass production.
Strong analytical capabilities
The ability to work independently and drive tasks from start to completion
Ability to work cross functionally with SW team to define and implement diagnostics for hardware validation at component, interface, and system level
Experience with server (x86 / ARM) design or architecture
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