Job Information
Google ASIC Design Verification Engineer in Bengaluru, India
Minimum qualifications:
Bachelor's degree in Electrical/Computer Science Engineering, or equivalent practical experience.
Experience verifying digital systems with standard IP components/interconnects, including microprocessor cores and hierarchical memory subsystems.
Experience in verifying digital logic at RTL using SystemVerilog for FPGAs and ASICs.
Experience verifying digital IP and subsystems.
Preferred qualifications:
Master's degree in Electrical Engineering, Computer Science, or a related field.
Experience creating/using verification components and environments in methodology.
Experience with image processing, computer vision, and/or machine learning applications.
Experience in prototyping and debugging systems on Field Programmable Gate Array (FPGA) platforms.
Experience with performance verification of ASIC components.
Familiarity with ASIC standard interfaces and memory system architecture.
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Plan the verification of IPs and Subsystem level by fully understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using System Verilog and Universal Verification Methodology (UVM).
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Identify verification holes and show progress towards tape-out.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.