Job Information
Google Signal and Power Integrity Engineer, Pixel in New Taipei City, Taiwan
Google welcomes people with disabilities.
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience
4 years of experience working with signal and power integrity simulation of system boards, including SoC/chipset, DDR memory, and other communication interfaces
Experience with industry SI simulation and lab tools (e.g., Ansys HFSS, SIwave, Designer, ADS)
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Engineering
8 years of experience with implementing a product development process for mass volume production design, with a focus on signal integrity, power integrity and Electromagnetic Interference (EMI)
Experience with LPDDR3 and LPDDR4 specifications, USB Type-C spec, and MIPI specifications
Experience with managing SIPI trade-off decisions with cross-functional teams to define an optimized solution that meets product design requirements
Knowledge of electromagnetic field and transmission line theory, including familiarity with TDR, VNA, probe station or real-time scope
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Signal and Power Integrity Engineer, you'll be involved in the early stages of project planning (e.g., component placement estimation, feasibility study, etc.). You will provide the floor planning of the Printed Circuit Board (PCB) stack-up and explore solution space through pre-layout simulation, setting constraints for PCB layout.
You'll also simulate Printed Circuit Board (PCB) Power Delivery Network (PDN) requirements, review the layout, provide the placement guide for High Frequency (HF) capacitors and Power/GND routing methodology to Electrical Engineering/Power/Layout team, and be involved within lab validation with Electrical Engineering team engineers.
The Google Pixel team focuses on designing and delivering the world's most helpful mobile experience. The team works on shaping the future of Pixel devices and services through some of the most advanced designs, techniques, products, and experiences in consumer electronics. This includes bringing together the best of Google’s artificial intelligence, software, and hardware to build global smartphones and create transformative experiences for users across the world.
Manage PCB layout SI and PDN of product and its sub-component development.
Drive resolution of SI and PI challenges in collaboration with the Design Engineering, and PCB Design and System teams.
Perform a correlation study between simulation and lab measurement to confirm simulation accuracy.
Provide simulation and Design of Experiments (DOEs) simulation to support cross-functional teams and system teams on SIPI related issue debugging, root cause, solution finding, and solution optimization.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.